Full-Lifecycle Reliability of Power Semiconductors in Focus|PFTN Concludes Successful Participation at 20th SDDC Annual Conference

The 20th Annual Conference on Semiconductor Discrete Devices, hosted by the China Semiconductor Industry Association, concluded successfully on July 24 in Yangzhou. Held from July 22 to 24, the event was convened under the theme "Innovation in Advanced Packaging Technology and Coordinated Development of the Industry Value Chain," bringing together over 600 experts, scholars, and corporate representatives for in-depth discussions on power semiconductor packaging advances and upstream-downstream value chain collaboration.
Shanghai Peifeng Tunan Semiconductor Co., Ltd. (hereinafter referred to as PFTN ) participated throughout the event, showcasing its full portfolio of semiconductor manufacturing EDA software at Booth B8. The company also delivered a technical presentation titled "Electro-Thermal-Mechanical Coupled Multiphysics Simulation of Semiconductor Power Modules: From High-Fidelity Chip-Level Power-Loss Modeling to Lifetime Prediction Across the Full Lifecycle." The presentation provided a platform for PFTN and industry peers to explore emerging approaches to power semiconductor reliability design.

During the event, the PFTN booth drew a steady flow of technical professionals. The company's team engaged with representatives from device design, manufacturing, packaging, and other segments of the value chain, holding in-depth discussions on real-world challenges in power semiconductor reliability design. Attendees showed strong interest in PFTN's TCAD simulation and multiphysics coupling capabilities, fueling lively exchanges throughout the exhibition.

On July 23, a PFTN technical expert presented "Electro-Thermal-Mechanical Coupled Multiphysics Simulation of Semiconductor Power Modules: From High-Fidelity Chip-Level Power-Loss Modeling to Lifetime Prediction Across the Full Lifecycle," offering a systematic overview of advanced applications of multiphysics coupled simulation in power-module design. The talk highlighted that, with the rapid expansion of power-module applications and accelerating adoption of wide-bandgap devices, package designs combining low parasitic inductance, low thermal resistance, and high reliability face increasingly stringent challenges. During operation, non-uniform temperature distributions and mismatches in the coefficients of thermal expansion among material layers can generate cyclic thermomechanical stress, leading to failure modes such as solder-layer fatigue and bond-wire lift-off. Accurately predicting power-module reliability over the full product lifecycle has therefore become a critical challenge for the industry. Using the Mozz TCAD platform, the PFTN team demonstrated an end-to-end technical workflow spanning high-fidelity chip-level power-loss modeling, coupled thermal-mechanical analysis of package structures, and full-lifecycle lifetime prediction. The workflow offers a new predictive simulation approach to the reliability design and optimization of power semiconductor devices.

Although the three-day event has concluded, dialogue and exploration continue. We sincerely thank everyone who visited the PFTN booth. The PFTN team will continue to follow up on every requirement gathered during the conference and further support the advancement of the power semiconductor industry through its self-developed EDA toolchain.
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